StackInterpreter: Fix awful bug in Context printing (wot I wrote) where the sanitised sp is printed rather than the awful truth. Have the CoInterpreter's interpret use the Cogit;s breakBlock if it has none and the Cogit has one.
CoInterpreter: Fix a major policy violation. To make doits fast I had made CoInterpreter>> executeNewMethod always JIT. But executeNewMethod is used in many more places than primitiveExecuteMethod[ArgsArray], which meant that methods were being over-eagerly jitted (such as in perform:). The Cog policy is only to JIT on second use, or several loop iterations, except for executeMewthod, where we need eager jitting to have jit speed doit performance.
So introduce executeNewMethodJitting, using it in primitiveExecuteMethod [ArgsArray] to do what it says, and revert executeNewMethod to not JIT (if the method is already jitted it will of course run the jit version).
Rename activateCoggedNewMethod: to the more comprehensible activateNewCogMethod:inInterpreter:, requiring all clients to pass in the newMethod methodHeader, which is the pointer to the cogMethod.
Cogit: Use LoadEffectiveAddressMw:r:R: in place of MoveR:R:, AddCq:R: in as many places as possible, including to set SmallInteger tags.
Improve the IMMUTABILITY store check/immutability trampolines by sharing the stack switch code between the two c ases and oinly taking the branch in the immutable/uncommon case. Hence extract trampoline return in to its own routine.
Refactor genWriteCResult[High]IntoReg: to do all the necessary checking. Move genLoadStackPointers to Cogit from the backEnd.
Fix old bug in ARM32 LoadEffectiveAddressMwrR Improve the ARM32 trampoline marshalling code fractionally.
Fix a slip in Lowcode FFI trampoline generation.
Gazillions of registers on ARMv8 => add Extra8Reg
Fix bug in genAlignCStackSavingRegisters:numArgs:wordAlignment:. Must ignore register arguments.
No need to flush the cache on rewriting prim invocaton if out-of-line literals are used.
A number of small improvements to context creation as part of reversing the order of comparison of the SPReg with anythin g else, to suit ARMv8.
Implement and use a full set of ShiftCqRR. Use three argument shifts to save an instruction in converting the result of a division primitive into a SmallInteger, and save an instruction getting the format of an object in at:[put:].
In calling machine code primitives on RISCs we must save & restore the link register around the call. We haven't noticed this issue before because we only have one mcprim (hashMultiply) and that gets implemeted entirely in generated machine code if a processor implements MulRR.
Since we're interested in performance and there are typically registers to spare, on RISC define saveAndRestoreLinkRegUsingCalleeSavedRegNotLiveAtPointOfSendAround: instead of using saveAndRestoreLinkRegAround: so that the Linkreg gets written and read from an available callee-saved reg (if available).
Split the generation of translated hashMultiply into a SmallInteger version and a Large(Positive)Integer version. hashMultiply never fails in SmallInteger.
Get the ARMv5 "stop" instruction (BKPT) correct.
Generalize OutOfLineLiteralsManager to function for 64 bits via OutOfLineLiteralsManagerFor64Bits. OutOfLineLiteralsManagerFor64Bits's job is to segregate 32-bit from 64-bit literals for better packing. Change the hack of using operand 1 in a literal to hold the "isSharable/isUnique not" flag to holding both the flag (now as an integer in the LSB) and the literal size (in a four bit field above the LSB).
Send trampolines must save & restore the link register around the selectorIndexDereferenceRoutine if on a 64-bit RISC.
Fix poor code for locating the last jump in the PIC prototype.
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