PhD offer - Brest france

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PhD offer - Brest france

Loïc Lagadec

Dear All,

We are looking for a top candidate to join our research group as a PhD  
student.
We have one opening in the area of Smalltalk-based Electronic Design  
Automation. Please could you broadcast to any interested student.

The position is to be filled as soon as possible. The project starts  
on 1st october 2011.

Kind Regards,

LoIc Lagadec







ARDyT - Fault tolerant  dynamically reconfigurable architecture
Position type: PhD Student
Functional area: Brest, France
Research theme: Smalltalk, Reconfigurable architecture, innovative  
toolkit design
Project: ARDyT
Contact: [hidden email]

Title: Instrospection plan compliant EDA toolset

Reconfigurable computing (eg. FPGAs) combines the flexibility of  
software with the high performances of hardware.
This comes from the on-demand metamorphosis of the hardware - at  
runtime - by "loading" a new circuit on the reconfigurable fabric, while
this technology also supports  extreme optimizations, by allowing  
drastic changes  to the datapath itself, in addition to tailoring the  
control flow as traditionaly met in microprocessors.

While improving performances has been the key issue for years, very  
few efforts have been reported in debug automation.
Debuging requires introspection capabilities, controlability and  
fast-changes support.  HLS  (High Level Synthesis) tools allow to  
compile high-level (C like) languages to netlist (electronic level),  
hence guarantee fast changes but controlability and instrospection are  
still very limited.
In the scope of the ARDyT project (supported by the French National  
Research Agency), some evolutions will be carried out over a classical  
FPGA such as embedding extra resources that will offer some  
introspection capabilities.

The PhD thesis will contribute to refactor/re-design an existing  
smalltalk based toolset in order to take into account these extra  
resources hence new paradigms such as to combine the computation plan  
and the instrospection plan of the proposed architecture. In addition,  
debug controllers will be made available on-demand within the netlist  
of the application.

This offers new exciting perspectives, in a scope of domain space  
exploration (DSE). A model oriented approach will be considered to  
ensure the durability of the resulting software and of its design  
method.
This PhD will be co-supervised by the Lab-STICC MOCS and IRISA.


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