VM Maker: Cog-eem.371.mcz

 
Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.371.mcz

==================== Summary ====================

Name: Cog-eem.371
Author: eem
Time: 24 November 2019, 7:47:28.106077 am
UUID: f8a8b383-cc2d-430c-a433-d2f4afcfdf73
Ancestors: Cog-eem.370

Start using the ARMv8A64Opcodes pools in GdbARMv8Alien.

=============== Diff against Cog-eem.370 ===============

Item was changed:
  CogProcessorAlien variableByteSubclass: #GdbARMv8Alien
  instanceVariableNames: ''
  classVariableNames: 'Level0FailureTable Level0OpcodeTable'
+ poolDictionaries: 'ARMv8A64Opcodes'
- poolDictionaries: ''
  category: 'Cog-Processors'!
 
  !GdbARMv8Alien commentStamp: 'eem 11/19/2019 15:39' prior: 0!
  I am a wrapper around the struct sim aarch64 CPU instance and emulator routines and I give access to disassembling using libopcodes.!

Item was changed:
  ----- Method: GdbARMv8Alien>>handleFailingBranch:at:in: (in category 'error handling') -----
  handleFailingBranch: instruction at: pc in: memoryArray "<Bitmap|ByteArray>"
  "see C4.1.3 Branches, Exception Generating and System instructions in Arm ARM.
  Table C4-4 op1 plus the two top bit of op1"
  | decode |
  decode := ((instruction bitShift: -29) bitShift: 1) + ((instruction bitShift: -25) bitAnd: 1).
  decode = 2r1101 ifTrue: "Unconditional branch (register) on page C4-262"
+ [instruction = RET ifTrue:
- [instruction = 2r11010110010111110000001111000000 ifTrue:
  [^(ProcessorSimulationTrap
  pc: pc
  nextpc: pc + 4
  address: self lr
  type: #return)
  signal]].
  self reportPrimitiveFailure!

Item was changed:
  ----- Method: GdbARMv8Alien>>nopOpcode (in category 'opcodes') -----
  nopOpcode
+ ^NOP!
- ^16rd503201f!