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VM Maker: VMMaker.oscog-eem.2194.mcz

commits-2
 
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2194.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.2194
Author: eem
Time: 13 April 2017, 3:06:53.413343 pm
UUID: 84683bad-a517-40de-bc34-4c1ac734826c
Ancestors: VMMaker.oscog-eem.2193

Fix a regression in VMMaker.oscog-eem.2138 & VMMaker.oscog-eem.2143 where receiverTags work broke cointer trips in special selector comparisons of known SmallIntegers.

Have compileAbstractInstructionsFrom:through: only check that extensions are consumed if the last bytewcode generator succeeded.

Rename Allocat(e)able to Allocable (OED).

Add some missing simulation glue. Comment the existence of the variable new inline primitives.

=============== Diff against VMMaker.oscog-eem.2193 ===============

Item was added:
+ ----- Method: CurrentImageCoInterpreterFacade>>maybeSelectorOfMethod: (in category 'accessing') -----
+ maybeSelectorOfMethod: methodOop
+ ^self oopForObject: (self objectForOop: methodOop) selector!

Item was changed:
  ----- Method: RegisterAllocatingCogit>>freeAnyRegNotConflictingWith: (in category 'simulation stack') -----
  freeAnyRegNotConflictingWith: regMask
  "Spill the closest register on stack not conflicting with regMask.
+ Override to unassign assigned temp regs if necessary."
- Override so no assertion failure if no register can be allocated."
  <var: #desc type: #'CogSimStackEntry *'>
+ | index desc |
- | reg index |
  self assert: needsFrame.
- reg := NoReg.
  index := simSpillBase max: 0.
+ [index < simStackPtr] whileTrue:
+ [desc := self simStackAt: index.
- [reg = NoReg and: [index < simStackPtr]] whileTrue:
- [ | desc |
- desc := self simStackAt: index.
  desc type = SSRegister ifTrue:
  [(regMask anyMask: (self registerMaskFor: desc register)) ifFalse:
+ [self ssAllocateRequiredReg: desc register.
+ ^desc register]].
- [reg := desc register]].
  index := index + 1].
+ 0 to: methodOrBlockNumTemps - 1 do:
+ [:i|
+ desc := self simStackAt: i.
+ (desc liveRegister = NoReg
+ or: [self register: desc liveRegister isInMask: regMask]) ifFalse:
+ [self ssAllocateRequiredReg: desc liveRegister.
+ ^desc liveRegister]].
+ ^NoReg!
- reg ~= NoReg ifTrue:
- [self ssAllocateRequiredReg: reg].
- ^reg!

Item was added:
+ ----- Method: SimpleStackBasedCogit>>genExtEnsureAllocableSlots (in category 'bytecode generators') -----
+ genExtEnsureAllocableSlots
+ "SistaV1 * 236 11101100 iiiiiiii Ensure Allocable Slots (+ Extend A * 256)"
+ | slots skip |
+ slots := (extA bitShift: 8) + byte1.
+ extA := 0.
+ self
+ MoveAw: objectMemory freeStartAddress R: TempReg;
+ CmpCq: objectMemory getScavengeThreshold - (objectMemory bytesPerOop * slots) R: TempReg.
+ skip := self JumpBelow: 0.
+ objectRepresentation genSetGCNeeded.
+ self CallRT: ceCheckForInterruptTrampoline.
+ skip jmpTarget: self Label.
+ self annotateBytecode: skip getJmpTarget.
+ ^0!

Item was removed:
- ----- Method: SimpleStackBasedCogit>>genExtEnsureAllocatableSlots (in category 'bytecode generators') -----
- genExtEnsureAllocatableSlots
- "SistaV1 * 236 11101100 iiiiiiii Ensure Allocatable Slots (+ Extend A * 256)"
- | slots skip |
- slots := (extA bitShift: 8) + byte1.
- extA := 0.
- self
- MoveAw: objectMemory freeStartAddress R: TempReg;
- CmpCq: objectMemory getScavengeThreshold - (objectMemory bytesPerOop * slots) R: TempReg.
- skip := self JumpBelow: 0.
- objectRepresentation genSetGCNeeded.
- self CallRT: ceCheckForInterruptTrampoline.
- skip jmpTarget: self Label.
- self annotateBytecode: skip getJmpTarget.
- ^0!

Item was changed:
  ----- Method: SistaCogit>>genSpecialSelectorComparison (in category 'bytecode generators') -----
  genSpecialSelectorComparison
  "Override to count inlined branches if followed by a conditional branch.
  We borrow the following conditional branch's counter and when about to
  inline the comparison we decrement the counter (without writing it back)
  and if it trips simply abort the inlining, falling back to the normal send which
  will then continue to the conditional branch which will trip and enter the abort."
  | nextPC postBranchPC targetPC primDescriptor branchDescriptor
   rcvrIsInt rcvrIsConst argIsIntConst argInt jumpNotSmallInts inlineCAB
   counterAddress countTripped counterReg index |
  <var: #countTripped type: #'AbstractInstruction *'>
  <var: #primDescriptor type: #'BytecodeDescriptor *'>
  <var: #jumpNotSmallInts type: #'AbstractInstruction *'>
  <var: #branchDescriptor type: #'BytecodeDescriptor *'>
 
  (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ self genSpecialSelectorComparisonWithoutCounters ].
 
  self ssFlushTo: simStackPtr - 2.
  primDescriptor := self generatorAt: byte0.
  argIsIntConst := self ssTop type = SSConstant
  and: [objectMemory isIntegerObject: (argInt := self ssTop constant)].
  rcvrIsInt := ((rcvrIsConst := (self ssValue: 1) type = SSConstant)
   and: [objectMemory isIntegerObject:(self ssValue: 1) constant])
  or: [self mclassIsSmallInteger and: [(self ssValue: 1) isSameEntryAs: (self addressOf: simSelf)]].
 
  "short-cut the jump if operands are SmallInteger constants."
  (argIsIntConst and: [rcvrIsInt and: [rcvrIsConst]]) ifTrue:
  [^ self genStaticallyResolvedSpecialSelectorComparison].
 
  self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target |
  branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetPC := target ].
 
  "Only interested in inlining if followed by a conditional branch."
  inlineCAB := branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse].
  "Further, only interested in inlining = and ~= if there's a SmallInteger constant involved.
  The relational operators successfully statically predict SmallIntegers; the equality operators do not."
  (inlineCAB and: [primDescriptor opcode = JumpZero or: [primDescriptor opcode = JumpNonZero]]) ifTrue:
  [inlineCAB := argIsIntConst or: [rcvrIsInt]].
  inlineCAB ifFalse:
  [^self genSpecialSelectorSend].
 
  argIsIntConst
  ifTrue:
  [(self ssValue: 1) popToReg: ReceiverResultReg.
  self ssPop: 2]
  ifFalse:
  [self marshallSendArguments: 1].
  jumpNotSmallInts := (rcvrIsInt and: [argIsIntConst]) ifFalse:
  [argIsIntConst
  ifTrue: [objectRepresentation genJumpNotSmallInteger: ReceiverResultReg]
  ifFalse:
  [rcvrIsInt
  ifTrue: [objectRepresentation genJumpNotSmallInteger: Arg0Reg]
  ifFalse: [objectRepresentation genJumpNotSmallIntegersIn: ReceiverResultReg and: Arg0Reg scratch: TempReg]]].
 
  counterReg := self allocateRegNotConflictingWith: (self registerMaskFor: ReceiverResultReg and: Arg0Reg).
  self
  genExecutionCountLogicInto: [ :cAddress :countTripBranch |
  counterAddress := cAddress.
  countTripped := countTripBranch ]
  counterReg: counterReg.
 
  argIsIntConst
  ifTrue: [self CmpCq: argInt R: ReceiverResultReg]
  ifFalse: [self CmpR: Arg0Reg R: ReceiverResultReg].
  "Cmp is weird/backwards so invert the comparison.  Further since there is a following conditional
  jump bytecode define non-merge fixups and leave the cond bytecode to set the mergeness."
  self genConditionalBranch: (branchDescriptor isBranchTrue
  ifTrue: [primDescriptor opcode]
  ifFalse: [self inverseBranchFor: primDescriptor opcode])
  operand: (self ensureNonMergeFixupAt: targetPC) asUnsignedInteger.
 
  self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress.
 
  self Jump: (self ensureNonMergeFixupAt: postBranchPC).
  countTripped jmpTarget: self Label.
+ jumpNotSmallInts
+ ifNil: [(self fixupAt: nextPC) notAFixup ifTrue:
+ [branchReachedOnlyForCounterTrip := true]]
+ ifNotNil: [jumpNotSmallInts jmpTarget: countTripped getJmpTarget].
- jumpNotSmallInts ifNil:
- [self annotateInstructionForBytecode.
- self ensureFixupAt: postBranchPC.
- self ensureFixupAt: targetPC.
- deadCode := true.
- ^0].
- jumpNotSmallInts jmpTarget: countTripped getJmpTarget.
 
  argIsIntConst ifTrue:
  [self MoveCq: argInt R: Arg0Reg].
  index := byte0 - self firstSpecialSelectorBytecodeOffset.
  ^self genMarshalledSend: index negated - 1 numArgs: 1 sendTable: ordinarySendTrampolines!

Item was changed:
  ----- Method: SistaCogitClone>>genBinaryConstOpVarInlinePrimitive: (in category 'inline primitive generators') -----
  genBinaryConstOpVarInlinePrimitive: prim
  "Const op var version of binary inline primitives."
  "SistaV1: 248 11111000 iiiiiiii mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1 means inlined primitive, no hard return after execution.
  See EncoderForSistaV1's class comment and StackInterpreter>>#binaryInlinePrimitive:"
  <option: #SistaVM>
  | ra val untaggedVal adjust |
  ra := self allocateRegForStackEntryAt: 0.
  self ssTop popToReg: ra.
  self ssPop: 1.
  val := self ssTop constant.
  self ssPop: 1.
  untaggedVal := val - objectMemory smallIntegerTag.
  prim caseOf: {
  "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op SmallInteger => SmallInteger, no overflow"
  [0] -> [self AddCq: untaggedVal R: ra].
  [1] -> [self MoveCq: val R: TempReg.
  self SubR: ra R: TempReg.
  objectRepresentation genAddSmallIntegerTagsTo: TempReg.
  self MoveR: TempReg R: ra].
  [2] -> [objectRepresentation genShiftAwaySmallIntegerTagsInScratchReg: ra.
  self MoveCq: untaggedVal R: TempReg.
  self MulR: TempReg R: ra.
  objectRepresentation genSetSmallIntegerTagsIn: ra].
 
+ "2011 through 2015 Variable-sized pointers new, byte new, 16-bit new, 32-bit new, 64-bit new"
+
  "2016 through 2020, bitAnd:, bitOr:, bitXor, bitShiftLeft:, bitShiftRight:, SmallInteger op SmallInteger => SmallInteger, no overflow"
  [16] -> [ self AndCq: val R: ra ].
  [17] -> [ self OrCq: val R: ra ].
  [18] -> [ self XorCw: untaggedVal R: ra. ].
  [19] -> [ objectRepresentation genConvertSmallIntegerToIntegerInReg: ra.
  self MoveCq: untaggedVal R: TempReg.
  self LogicalShiftLeftR: ra R: TempReg.
  objectRepresentation genAddSmallIntegerTagsTo: TempReg.
  self MoveR: TempReg R: ra].
  [20] -> [objectRepresentation genConvertSmallIntegerToIntegerInReg: ra.
  self MoveCq: untaggedVal R: TempReg.
  self ArithmeticShiftRightR: ra R: TempReg.
  objectRepresentation genClearAndSetSmallIntegerTagsIn: TempReg.
  self MoveR: TempReg R: ra].
 
  "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags value, just generate the instruction!!!!)"
  "CmpCqR is SubRCq so everything is reversed, but because no CmpRCq things are reversed again and we invert the sense of the jumps."
  [32] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpLess opFalse: JumpGreaterOrEqual destReg: ra ].
  [33] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpGreater opFalse: JumpLessOrEqual destReg: ra ].
  [34] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpLessOrEqual opFalse: JumpGreater destReg: ra ].
  [35] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpGreaterOrEqual opFalse: JumpLess destReg: ra ].
  [36] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpZero opFalse: JumpNonZero destReg: ra ].
  [37] -> [ self CmpCq: val R: ra.
  self genBinaryInlineComparison: JumpNonZero opFalse: JumpZero destReg: ra ].
 
  "2064 through 2068, Pointer Object>>at:, Byte Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word Object>>at:. obj op 0-rel SmallInteger => oop"
  [64] -> [objectRepresentation genConvertSmallIntegerToIntegerInReg: ra.
  adjust := (objectMemory baseHeaderSize >> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from 1 relative to zero relative"
  adjust ~= 0 ifTrue: [ self AddCq: adjust R: ra. ].
  self genMoveConstant: val R: TempReg.
  self MoveXwr: ra R: TempReg R: ra].
  [65] -> [objectRepresentation genConvertSmallIntegerToIntegerInReg: ra.
  adjust := objectMemory baseHeaderSize - 1. "shift by baseHeaderSize and then move from 1 relative to zero relative"
  self AddCq: adjust R: ra.
  self genMoveConstant: val R: TempReg.
  self MoveXbr: ra R: TempReg R: ra.
  objectRepresentation genConvertIntegerToSmallIntegerInReg: ra]
  }
  otherwise: [^EncounteredUnknownBytecode].
  self ssPushRegister: ra.
  ^0!

Item was added:
+ ----- Method: SistaCogitClone>>getCogCodeZoneThreshold (in category 'accessing') -----
+ getCogCodeZoneThreshold
+ <doNotGenerate>
+ ^methodZone getCogCodeZoneThreshold!

Item was added:
+ ----- Method: StackDepthFinder>>ensureAllocableSlots: (in category 'instruction decoding') -----
+ ensureAllocableSlots: numSlots
+ "nothing to do here..."!

Item was removed:
- ----- Method: StackDepthFinder>>ensureAllocateableSlots: (in category 'instruction decoding') -----
- ensureAllocateableSlots: numSlots
- "nothing to do here..."!

Item was changed:
  ----- Method: StackInterpreter class>>initializeBytecodeTableForSistaV1 (in category 'initialization') -----
  initializeBytecodeTableForSistaV1
  "See e.g. the cass comment for EncoderForSistaV1"
  "StackInterpreter initializeBytecodeTableForSistaV1"
  "Note: This table will be used to generate a C switch statement."
 
  initializationOptions at: #SistaV1BytecodeSet put: (SistaV1BytecodeSet := true).
 
  BytecodeTable := Array new: 256.
  BytecodeEncoderClassName := #EncoderForSistaV1.
  BytecodeSetHasDirectedSuperSend := true.
  BytecodeSetHasExtensions := true.
  LongStoreBytecode := 245.
  self table: BytecodeTable from:
  #( "1 byte bytecodes"
  (   0  15 pushReceiverVariableBytecode)
  ( 16  31 pushLiteralVariable16CasesBytecode)
  ( 32  63 pushLiteralConstantBytecode)
  ( 64  75 pushTemporaryVariableBytecode)
  ( 76 pushReceiverBytecode)
  ( 77 pushConstantTrueBytecode)
  ( 78 pushConstantFalseBytecode)
  ( 79 pushConstantNilBytecode)
  ( 80 pushConstantZeroBytecode)
  ( 81 pushConstantOneBytecode)
  ( 82 extPushPseudoVariable)
  ( 83 duplicateTopBytecode)
 
  ( 84 87 unknownBytecode)
  ( 88 returnReceiver)
  ( 89 returnTrue)
  ( 90 returnFalse)
  ( 91 returnNil)
  ( 92 returnTopFromMethod)
  ( 93 returnNilFromBlock)
  ( 94 returnTopFromBlock)
  ( 95 extNopBytecode)
 
  ( 96 bytecodePrimAdd)
  ( 97 bytecodePrimSubtract)
  ( 98 bytecodePrimLessThanSistaV1) "for booleanCheatSistaV1:"
  ( 99 bytecodePrimGreaterThanSistaV1) "for booleanCheatSistaV1:"
  (100 bytecodePrimLessOrEqualSistaV1) "for booleanCheatSistaV1:"
  (101 bytecodePrimGreaterOrEqualSistaV1) "for booleanCheatSistaV1:"
  (102 bytecodePrimEqualSistaV1) "for booleanCheatSistaV1:"
  (103 bytecodePrimNotEqualSistaV1) "for booleanCheatSistaV1:"
  (104 bytecodePrimMultiply)
  (105 bytecodePrimDivide)
  (106 bytecodePrimMod)
  (107 bytecodePrimMakePoint)
  (108 bytecodePrimBitShift)
  (109 bytecodePrimDiv)
  (110 bytecodePrimBitAnd)
  (111 bytecodePrimBitOr)
 
  (112 bytecodePrimAt)
  (113 bytecodePrimAtPut)
  (114 bytecodePrimSize)
  (115 bytecodePrimNext) "i.e. a 0 arg special selector"
  (116 bytecodePrimNextPut) "i.e. a 1 arg special selector"
  (117 bytecodePrimAtEnd)
  (118 bytecodePrimIdenticalSistaV1) "for booleanCheatSistaV1:"
  (119 bytecodePrimClass)
  (120 bytecodePrimNotIdenticalSistaV1) "was blockCopy:"
  (121 bytecodePrimValue)
  (122 bytecodePrimValueWithArg)
  (123 bytecodePrimDo) "i.e. a 1 arg special selector"
  (124 bytecodePrimNew) "i.e. a 0 arg special selector"
  (125 bytecodePrimNewWithArg) "i.e. a 1 arg special selector"
  (126 bytecodePrimPointX) "i.e. a 0 arg special selector"
  (127 bytecodePrimPointY) "i.e. a 0 arg special selector"
 
  (128 143 sendLiteralSelector0ArgsBytecode)
  (144 159 sendLiteralSelector1ArgBytecode)
  (160 175 sendLiteralSelector2ArgsBytecode)
 
  (176 183 shortUnconditionalJump)
  (184 191 shortConditionalJumpTrue)
  (192 199 shortConditionalJumpFalse)
 
  (200 207 storeAndPopReceiverVariableBytecode)
  (208 215 storeAndPopTemporaryVariableBytecode)
  (216 popStackBytecode)
  (217 unconditionnalTrapBytecode)
 
  (218 223 unknownBytecode)
 
  "2 byte bytecodes"
  (224 extABytecode)
  (225 extBBytecode)
 
  (226 extPushReceiverVariableBytecode)
  (227 extPushLiteralVariableBytecode)
  (228 extPushLiteralBytecode)
  (229 longPushTemporaryVariableBytecode)
  (230 unknownBytecode)
  (231 pushNewArrayBytecode)
  (232 extPushIntegerBytecode)
  (233 extPushCharacterBytecode)
 
  (234 extSendBytecode)
  (235 extSendSuperBytecode)
 
+ (236 extEnsureAllocableSlots)
- (236 extEnsureAllocatableSlots)
 
  (237 extUnconditionalJump)
  (238 extJumpIfTrue)
  (239 extJumpIfFalse)
 
  (240 extSistaStoreAndPopReceiverVariableBytecode)
  (241 extSistaStoreAndPopLiteralVariableBytecode)
  (242 longStoreAndPopTemporaryVariableBytecode)
 
  (243 extSistaStoreReceiverVariableBytecode)
  (244 extSistaStoreLiteralVariableBytecode)
  (245 longStoreTemporaryVariableBytecode)
 
  (246 247 unknownBytecode)
 
  "3 byte bytecodes"
  (248 callPrimitiveBytecode)
  (249 extPushFullClosureBytecode)
 
  (250 extPushClosureBytecode)
  (251 extPushRemoteTempOrInstVarLongBytecode)
  (252 extStoreRemoteTempOrInstVarLongBytecode)
  (253 extStoreAndPopRemoteTempOrInstVarLongBytecode)
 
  (254 extJumpIfNotInstanceOfBehaviorsBytecode)
 
  (255 unknownBytecode)
  )!

Item was added:
+ ----- Method: StackInterpreter>>extEnsureAllocableSlots (in category 'miscellaneous bytecodes') -----
+ extEnsureAllocableSlots
+ "SistaV1 * 236 11101100 iiiiiiii Ensure Allocable Slots (+ Extend A * 256)"
+ | slots ok |
+ slots := (extA bitShift: 8) + self fetchByte.
+ self fetchNextBytecode.
+ extA := 0.
+ ok := objectMemory checkForAvailableSlots: slots.
+ ok ifFalse:
+ [self externalizeIPandSP.
+ self checkForEventsMayContextSwitch: true.
+ self browserPluginReturnIfNeeded.
+ self internalizeIPandSP]!

Item was removed:
- ----- Method: StackInterpreter>>extEnsureAllocatableSlots (in category 'miscellaneous bytecodes') -----
- extEnsureAllocatableSlots
- "SistaV1 * 236 11101100 iiiiiiii Ensure Allocatable Slots (+ Extend A * 256)"
- | slots ok |
- slots := (extA bitShift: 8) + self fetchByte.
- self fetchNextBytecode.
- extA := 0.
- ok := objectMemory checkForAvailableSlots: slots.
- ok ifFalse:
- [self externalizeIPandSP.
- self checkForEventsMayContextSwitch: true.
- self browserPluginReturnIfNeeded.
- self internalizeIPandSP]!

Item was changed:
  ----- Method: StackToRegisterMappingCogit class>>initializeBytecodeTableForSistaV1 (in category 'class initialization') -----
  initializeBytecodeTableForSistaV1
  "StackToRegisterMappingCogit initializeBytecodeTableForSistaV1"
 
  numPushNilsFunction := #sistaV1:Num:Push:Nils:.
  pushNilSizeFunction := #sistaV1PushNilSize:numInitialNils:.
  BytecodeSetHasDirectedSuperSend := true.
  FirstSpecialSelector := 96.
  NumSpecialSelectors := 32.
  self flag:
  'Special selector send class must be inlined to agree with the interpreter, which
   inlines class.  If class is sent to e.g. a general instance of ProtoObject then unless
   class is inlined there will be an MNU.  It must be that the Cointerpreter and Cogit
   have identical semantics.  We get away with not hardwiring the other special
   selectors either because in the Cointerpreter they are not inlined or because they
   are inlined only to instances of classes for which there will always be a method.'.
  self generatorTableFrom: #(
  "1 byte bytecodes"
  "pushes"
  (1    0   15 genPushReceiverVariableBytecode isInstVarRef needsFrameNever: 1)
  (1  16   31 genPushLitVarDirSup16CasesBytecode needsFrameNever: 1)
  (1  32   63 genPushLiteralConstantBytecode needsFrameNever: 1)
  (1  64   75 genPushTemporaryVariableBytecode needsFrameIfMod16GENumArgs: 1)
  (1  76   76 genPushReceiverBytecode needsFrameNever: 1)
  (1  77   77 genPushConstantTrueBytecode needsFrameNever: 1)
  (1  78   78 genPushConstantFalseBytecode needsFrameNever: 1)
  (1  79   79 genPushConstantNilBytecode needsFrameNever: 1)
  (1  80   80 genPushConstantZeroBytecode needsFrameNever: 1)
  (1  81   81 genPushConstantOneBytecode needsFrameNever: 1)
  (1  82   82 genExtPushPseudoVariable)
  (1  83   83 duplicateTopBytecode needsFrameNever: 1)
 
  (1  84   87 unknownBytecode)
 
  "returns"
  (1  88   88 genReturnReceiver return needsFrameIfInBlock: isMappedInBlock 0)
  (1  89   89 genReturnTrue return needsFrameIfInBlock: isMappedInBlock 0)
  (1  90   90 genReturnFalse return needsFrameIfInBlock: isMappedInBlock 0)
  (1  91   91 genReturnNil return needsFrameIfInBlock: isMappedInBlock 0)
  (1  92   92 genReturnTopFromMethod return needsFrameIfInBlock: isMappedInBlock -1)
  (1  93   93 genReturnNilFromBlock return needsFrameNever: -1)
  (1  94   94 genReturnTopFromBlock return needsFrameNever: -1)
  (1  95   95 genExtNopBytecode needsFrameNever: 0)
 
  "sends"
  (1  96   96 genSpecialSelectorArithmetic isMapped AddRR)
  (1  97   97 genSpecialSelectorArithmetic isMapped SubRR)
  (1  98   98 genSpecialSelectorComparison isMapped JumpLess)
  (1  99   99 genSpecialSelectorComparison isMapped JumpGreater)
  (1 100 100 genSpecialSelectorComparison isMapped JumpLessOrEqual)
  (1 101 101 genSpecialSelectorComparison isMapped JumpGreaterOrEqual)
  (1 102 102 genSpecialSelectorComparison isMapped JumpZero)
  (1 103 103 genSpecialSelectorComparison isMapped JumpNonZero)
  (1 104 109 genSpecialSelectorSend isMapped) " #* #/ #\\ #@ #bitShift: //"
  (1 110 110 genSpecialSelectorArithmetic isMapped AndRR)
  (1 111 111 genSpecialSelectorArithmetic isMapped OrRR)
  (1 112 117 genSpecialSelectorSend isMapped) "#at: #at:put: #size #next #nextPut: #atEnd"
  (1 118 118 genSpecialSelectorEqualsEquals needsFrameNever: notMapped -1) "not mapped because it is directly inlined (for now)"
  (1 119 119 genSpecialSelectorClass needsFrameIfStackGreaterThanOne: notMapped 0) "not mapped because it is directly inlined (for now)"
  (1 120 120 genSpecialSelectorNotEqualsEquals needsFrameNever: notMapped -1) "not mapped because it is directly inlined (for now)"
  (1 121 127 genSpecialSelectorSend isMapped) "#value #value: #do: #new #new: #x #y"
 
  (1 128 143 genSendLiteralSelector0ArgsBytecode isMapped)
  (1 144 159 genSendLiteralSelector1ArgBytecode isMapped)
  (1 160 175 genSendLiteralSelector2ArgsBytecode isMapped)
 
  "jumps"
  (1 176 183 genShortUnconditionalJump branch v3:ShortForward:Branch:Distance:)
  (1 184 191 genShortJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean"
  v3:ShortForward:Branch:Distance:)
  (1 192 199 genShortJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean"
  v3:ShortForward:Branch:Distance:)
  (1 200 207 genStoreAndPopReceiverVariableBytecode isInstVarRef is1ByteInstVarStore isMappedIfImmutability needsFrameIfImmutability: -1)
 
  (1 208 215 genStoreAndPopTemporaryVariableBytecode)
 
  (1 216 216 genPopStackBytecode needsFrameNever: -1)
 
  (1 217 217 genUnconditionalTrapBytecode isMapped)
 
  (1 218 223 unknownBytecode)
 
  "2 byte bytecodes"
  (2 224 224 extABytecode extension)
  (2 225 225 extBBytecode extension)
 
  "pushes"
  (2 226 226 genExtPushReceiverVariableBytecode isInstVarRef) "Needs a frame for context inst var access"
  (2 227 227 genExtPushLitVarDirSupBytecode needsFrameNever: 1)
  (2 228 228 genExtPushLiteralBytecode needsFrameNever: 1)
  (2 229 229 genLongPushTemporaryVariableBytecode)
  (2 230 230 unknownBytecode)
  (2 231 231 genPushNewArrayBytecode)
  (2 232 232 genExtPushIntegerBytecode needsFrameNever: 1)
  (2 233 233 genExtPushCharacterBytecode needsFrameNever: 1)
 
  "returns"
  "sends"
  (2 234 234 genExtSendBytecode isMapped)
  (2 235 235 genExtSendSuperBytecode isMapped)
 
  "sista bytecodes"
+ (2 236 236 genExtEnsureAllocableSlots isMapped)
- (2 236 236 genExtEnsureAllocatableSlots isMapped)
 
  "jumps"
  (2 237 237 genExtUnconditionalJump branch isMapped "because of interrupt check" v4:Long:Branch:Distance:)
  (2 238 238 genExtJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:)
  (2 239 239 genExtJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:)
 
  "stores"
  (2 240 240 genSistaExtStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability)
  (2 241 241 genSistaExtStoreAndPopLiteralVariableBytecode isMappedIfImmutability)
  (2 242 242 genLongStoreAndPopTemporaryVariableBytecode)
  (2 243 243 genSistaExtStoreReceiverVariableBytecode isInstVarRef isMappedIfImmutability)
  (2 244 244 genSistaExtStoreLiteralVariableBytecode isMappedIfImmutability)
  (2 245 245 genLongStoreTemporaryVariableBytecode)
 
  (2 246 247 unknownBytecode)
 
  "3 byte bytecodes"
  (3 248 248 genCallPrimitiveBytecode)
  (3 249 249 genExtPushFullClosureBytecode)
  (3 250 250 genExtPushClosureBytecode block v4:Block:Code:Size:)
  (3 251 251 genExtPushRemoteTempOrInstVarLongBytecode)
  (3 252 252 genExtStoreRemoteTempOrInstVarLongBytecode isMappedIfImmutability)
  (3 253 253 genExtStoreAndPopRemoteTempOrInstVarLongBytecode isMappedIfImmutability)
 
  (3 254 254 genExtJumpIfNotInstanceOfBehaviorsBytecode branch v4:Long:BranchIfNotInstanceOf:Distance:)
 
  (3 255 255 unknownBytecode))!

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>compileAbstractInstructionsFrom:through: (in category 'compile abstract instructions') -----
  compileAbstractInstructionsFrom: start through: end
  "Loop over bytecodes, dispatching to the generator for each bytecode, handling fixups in due course."
  | nextOpcodeIndex descriptor nExts fixup result |
  <var: #descriptor type: #'BytecodeDescriptor *'>
  <var: #fixup type: #'BytecodeFixup *'>
  self traceSimStack.
  bytecodePC := start.
  nExts := result := 0.
  descriptor := nil.
  deadCode := false.
  [self maybeHaltIfDebugPC.
  fixup := self fixupAt: bytecodePC.
  self mergeWithFixupIfRequired: fixup.
  self assertCorrectSimStackPtr.
  descriptor := self loadBytesAndGetDescriptor.
  nextOpcodeIndex := opcodeIndex.
  result := deadCode
  ifTrue: [self mapDeadDescriptorIfNeeded: descriptor]
  ifFalse: [self perform: descriptor generator].
+ result = 0 ifTrue: [self assertExtsAreConsumed: descriptor].
- self assertExtsAreConsumed: descriptor.
  self traceDescriptor: descriptor; traceSimStack.
  self patchFixupTargetIfNeeded: fixup nextOpcodeIndex: nextOpcodeIndex.
  self maybeDumpLiterals: descriptor.
  bytecodePC := self nextBytecodePCFor: descriptor exts: nExts.
  result = 0 and: [bytecodePC <= end]] whileTrue:
  [nExts := descriptor isExtension ifTrue: [nExts + 1] ifFalse: [0]].
  self checkEnoughOpcodes.
  ^result!

Item was added:
+ ----- Method: StackToRegisterMappingCogit>>genExtEnsureAllocableSlots (in category 'bytecode generators') -----
+ genExtEnsureAllocableSlots
+ "SistaV1 * 236 11101100 iiiiiiii Ensure Allocable Slots (+ Extend A * 256)"
+ self ssFlushTo: simStackPtr.
+ ^super genExtEnsureAllocableSlots!

Item was removed:
- ----- Method: StackToRegisterMappingCogit>>genExtEnsureAllocatableSlots (in category 'bytecode generators') -----
- genExtEnsureAllocatableSlots
- "SistaV1 * 236 11101100 iiiiiiii Ensure Allocatable Slots (+ Extend A * 256)"
- self ssFlushTo: simStackPtr.
- ^super genExtEnsureAllocatableSlots!

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