Branch: refs/heads/Cog
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https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: d32dce9cd02406014b04a6bbb32d1c0414017633
https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/d32dce9cd02406014b04a6bbb32d1c0414017633 Author: Nicolas Cellier <
[hidden email]>
Date: 2020-02-17 (Mon, 17 Feb 2020)
Changed paths:
M nsspursrc/vm/cogit.h
M nsspursrc/vm/cogitARMv5.c
M nsspursrc/vm/cogitIA32.c
M nsspursrc/vm/cogitMIPSEL.c
M nsspursrc/vm/cointerp.c
M nsspursrc/vm/cointerp.h
M nsspursrc/vm/gcc3x-cointerp.c
M spurlowcodesrc/vm/cogit.h
M spurlowcodesrc/vm/cogitARMv5.c
M spurlowcodesrc/vm/cogitIA32.c
M spurlowcodesrc/vm/cogitMIPSEL.c
M spurlowcodesrc/vm/cointerp.c
M spurlowcodesrc/vm/cointerp.h
M spurlowcodesrc/vm/gcc3x-cointerp.c
M spursistasrc/vm/cogit.h
M spursistasrc/vm/cogitARMv5.c
M spursistasrc/vm/cogitIA32.c
M spursistasrc/vm/cogitMIPSEL.c
M spursistasrc/vm/cointerp.c
M spursistasrc/vm/cointerp.h
M spursistasrc/vm/gcc3x-cointerp.c
M spursrc/vm/cogit.c
M spursrc/vm/cogit.h
M spursrc/vm/cogitARMv5.c
M spursrc/vm/cogitIA32.c
M spursrc/vm/cogitMIPSEL.c
M spursrc/vm/cogmethod.h
M spursrc/vm/cointerp.c
M spursrc/vm/cointerp.h
M spursrc/vm/cointerpmt.c
M spursrc/vm/cointerpmt.h
M spursrc/vm/exampleSqNamedPrims.h
M spursrc/vm/gcc3x-cointerp.c
M spursrc/vm/gcc3x-cointerpmt.c
M spursrc/vm/interp.h
M spursrc/vm/vmCallback.h
M src/plugins/LargeIntegers/LargeIntegers.c
M src/vm/cogit.h
M src/vm/cogitARMv5.c
M src/vm/cogitIA32.c
M src/vm/cogitMIPSEL.c
M src/vm/cointerp.c
M src/vm/cointerp.h
M src/vm/cointerpmt.c
M src/vm/cointerpmt.h
M src/vm/gcc3x-cointerp.c
M src/vm/gcc3x-cointerpmt.c
Log Message:
-----------
Regenerate 32bits Cog/Spur code as of VMMaker.oscog-nice.2712
Fix alternative code generation for highBit via BSR for Spur32:
Previous opcode is a Label, so we cannot test if it setsConditionCodesFor: JumpNegative.
We have to force a CmpCq:R:.
For X64, it's OK, previous opcode is an arithmetic shift.
Fix simulation of primitiveHighBit by sending #numSmallIntegerTagBits to the objectMemory which knows this kind of memory layout detail.
While at it, change the order of BSR registers maskReg -> destReg, like any other CogRTLOpcodes, rather than destReg <- maskReg.
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Name: VMMaker.oscog-nice.2711
Accelerate SmallInteger anyBitOfMagnitudeFrom:to:
Indeed, there is no need to create a large integer just for checking the bits of a small one; this can be done with a single bit mask.
Avoid some undefined behavior warnings related to integerObjectOf(-1) when compiling the VM with clang compiler option -fsanitize=undefined.
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VMMaker.oscog-eem.2710
Cogit: remove some references to BytesPerOop in Lowcode. There are still lots of references to BytesPerWord we would like to rewrite to objectMemory bytesPerWord. The issue is that using the messages allows us to have 32-bit and 64-bit images open side-by-side and at least have printing working.
SitackInterpreterSimulator:
Fix a bug in endPCOf: that hence fixes symbolicMethod:
Provide a breakBlock somewhat similar to the CogVMSimulator's
Have StackInterpreterSimulator>>close close attendant debuggers a la CogVMSimulator
Update the arg name in CogVMSimulator>>setBreakBlockFromString:
------
VMMaker.oscog-nice.2709
Try and restore the lowcode capability to return int64 result on various 32bits ABI.
The ABIResultRegHigh needs to be defined.
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VMMaker.oscog-eem.2708
Document the NativeSPReg/SPReg distinction/identity.
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VMMaker.oscog-eem.2707
Slang: Eliminate one source of unused expressions, the expansions of literal block nodes not used for value with a trailing effectless expression.
Dual mapped zone:
Make assertValidDualZoneFrom:to: conditional on cppIf: #DUAL_MAPPED_CODE_ZONE
------
VMMaker.oscog-eem.2706
Simulation: Fix printRumpCStack and have it be more informative.
Locked
