Branch: refs/heads/Cog
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https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: f3947d4d07faad02fdbc20a98dbfad19e6117a8d
https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/f3947d4d07faad02fdbc20a98dbfad19e6117a8d Author: Eliot Miranda <
[hidden email]>
Date: 2020-11-13 (Fri, 13 Nov 2020)
Changed paths:
M nsspur64src/vm/cogit.h
M nsspur64src/vm/cogitARMv8.c
M nsspur64src/vm/cogitX64SysV.c
M nsspur64src/vm/cogitX64WIN64.c
M nsspursrc/vm/cogit.h
M nsspursrc/vm/cogitARMv5.c
M nsspursrc/vm/cogitIA32.c
M nsspursrc/vm/cogitMIPSEL.c
M spur64src/vm/cogit.h
M spur64src/vm/cogitARMv8.c
M spur64src/vm/cogitX64SysV.c
M spur64src/vm/cogitX64WIN64.c
M spur64src/vm/cointerpmt.c
M spur64src/vm/cointerpmt.h
M spur64src/vm/gcc3x-cointerpmt.c
M spurlowcode64src/vm/cogit.h
M spurlowcode64src/vm/cogitARMv8.c
M spurlowcode64src/vm/cogitX64SysV.c
M spurlowcode64src/vm/cogitX64WIN64.c
M spurlowcodesrc/vm/cogit.h
M spurlowcodesrc/vm/cogitARMv5.c
M spurlowcodesrc/vm/cogitIA32.c
M spurlowcodesrc/vm/cogitMIPSEL.c
M spursista64src/vm/cogit.h
M spursista64src/vm/cogitARMv8.c
M spursista64src/vm/cogitX64SysV.c
M spursista64src/vm/cogitX64WIN64.c
M spursistasrc/vm/cogit.h
M spursistasrc/vm/cogitARMv5.c
M spursistasrc/vm/cogitIA32.c
M spursistasrc/vm/cogitMIPSEL.c
M spursrc/vm/cogit.h
M spursrc/vm/cogitARMv5.c
M spursrc/vm/cogitIA32.c
M spursrc/vm/cogitMIPSEL.c
M spursrc/vm/cointerpmt.c
M spursrc/vm/cointerpmt.h
M spursrc/vm/gcc3x-cointerpmt.c
M src/vm/cogit.h
M src/vm/cogitARMv5.c
M src/vm/cogitIA32.c
M src/vm/cogitMIPSEL.c
Log Message:
-----------
CogVM source as per VMMaker.oscog-eem.2883/ClosedVMMaker-eem.112
Cogit:
generateLowLevelUnlock: is unused.
ARMv8 Cogit:
Correctly detect if Atomic Instructions are available (at least using code that
works on RPi 4). Implement the 8.0 version of ceTryLockVMOwner above
LDAXR/STLXR/CLREX, adding spiffy new CBNZ/CBZ.