VM Maker: Cog-eem.408.mcz

 
Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.408.mcz

==================== Summary ====================

Name: Cog-eem.408
Author: eem
Time: 13 September 2020, 7:41:48.817418 pm
UUID: 5a782536-c075-4a4c-897c-c63bd9e993d2
Ancestors: Cog-eem.407

Fix a typo.
Make MIPS[EL]Simulator simulate a bit...

=============== Diff against Cog-eem.407 ===============

Item was changed:
  ----- Method: BochsIA32Alien>>integerRegisterState (in category 'accessing-abstract') -----
  integerRegisterState
  "Answer a WordArray of the integer registers, the pc and the flags.
  This primitive is unnecessary; it exists only to speed up single-stepping.
+ If the primitive fails fall back and yield an Array of the same."
- If the primitive fails fall abck and yield an Array of the same."
  <primitive: 'primitiveIntegerRegisterState' module: 'BochsIA32Plugin'>
  ^{ self eax. self ebx. self ecx. self edx. self esp. self ebp. self esi. self edi.
  self eip. self eflags }!

Item was changed:
  ----- Method: BochsX64Alien>>integerRegisterState (in category 'accessing-abstract') -----
  integerRegisterState
  "Answer a DoubleWordArray of the integer registers, the pc and the flags.
  This primitive is unnecessary; it exists only to speed up single-stepping.
+ If the primitive fails fall back and yield an Array of the same."
- If the primitive fails fall abck and yield an Array of the same."
  <primitive: 'primitiveIntegerRegisterState' module: 'BochsX64Plugin'>
  ^{ self rax. self rbx. self rcx. self rdx. self rsp. self rbp. self rsi. self rdi.
  self r8. self r9. self r10. self r11. self r12. self r13. self r14. self r15.
  self rip. self rflags }!

Item was changed:
  ----- Method: GdbARMAlien>>integerRegisterState (in category 'accessing-abstract') -----
  integerRegisterState
  "Answer a WordArray of the integer registers, the pc and the flags.
  This primitive is unnecessary; it exists only to speed up single-stepping.
+ If the primitive fails fall back and yield an Array of the same."
- If the primitive fails fall abck and yield an Array of the same."
  <primitive: 'primitiveIntegerRegisterState' module: 'GdbARMPlugin'>
  ^{ self r0. self r1. self r2. self r3. self r4. self r5. self r6. self r7. self r8.
  self r9. self sl. self fp. self r12. self sp. self lr. self pc. self rawCPSR}!

Item was removed:
- ----- Method: MIPSELSimulator>>signedByte: (in category 'memory') -----
- signedByte: address
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- ^memory signedByteAt: address + 1!

Item was removed:
- ----- Method: MIPSELSimulator>>signedHalfword: (in category 'memory') -----
- signedHalfword: address
- (address bitAnd: 1) = 0 ifFalse: [self error: 'Unaligned read'].
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- ^memory signedShortAt: address + 1!

Item was removed:
- ----- Method: MIPSELSimulator>>signedWord: (in category 'memory') -----
- signedWord: address
- (address bitAnd: 3) = 0 ifFalse: [self error: 'Unaligned read'].
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- ^memory longAt: address + 1!

Item was changed:
  ----- Method: MIPSELSimulator>>signedWord:put: (in category 'memory') -----
  signedWord: address put: value
  (address bitAnd: 3) = 0 ifFalse: [self error: 'Unaligned read'].
+ ^(address between: writableBase and: writableLimit)
+ ifTrue: [memory longAt: address + 1 put: value]
+ ifFalse: [self writeFault: address]!
- address < writableBase ifTrue: [self writeFault: address].
- address > writableLimit ifTrue: [self writeFault: address].
- ^memory longAt: address + 1 put: value!

Item was removed:
- ----- Method: MIPSELSimulator>>unsignedByte: (in category 'memory') -----
- unsignedByte: address
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- ^memory byteAt: address + 1!

Item was removed:
- ----- Method: MIPSELSimulator>>unsignedHalfword: (in category 'memory') -----
- unsignedHalfword: address
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- (address bitAnd: 1) = 0 ifFalse: [self error: 'Unaligned read'].
- ^memory unsignedShortAt: address + 1!

Item was removed:
- ----- Method: MIPSELSimulator>>unsignedWord: (in category 'memory') -----
- unsignedWord: address
- address < readableBase ifTrue: [self readFault: address].
- address > readableLimit ifTrue: [self readFault: address].
- (address bitAnd: 3) = 0 ifFalse: [self error: 'Unaligned read'].
- ^memory unsignedLongAt: address + 1 bigEndian: false!

Item was added:
+ ----- Method: MIPSSimulator>>accessorIsFramePointerSetter: (in category 'accessing-abstract') -----
+ accessorIsFramePointerSetter: aSymbol
+ ^aSymbol == #fp:!

Item was added:
+ ----- Method: MIPSSimulator>>integerRegisterState (in category 'accessing-abstract') -----
+ integerRegisterState
+ "Answer an Array of the integer registers and the pc."
+ | integerRegisterState |
+ integerRegisterState := Array new: 33.
+ integerRegisterState
+ at: 1 put: 0;
+ replaceFrom: 2 to: 32 with: registers startingAt: 1;
+ at: 33 put: pc.
+ ^integerRegisterState!

Item was changed:
  ----- Method: MIPSSimulator>>loadByte: (in category 'instructions - memory') -----
  loadByte: instruction
+ | base address |
- | base address value |
  base := self unsignedRegister: instruction rs.
+ address := base + instruction signedImmediate..
+ (address between: readableBase and: readableLimit)
+ ifTrue: [self signedRegister: instruction rt put: (memory signedByteAt: address + 1)]
+ ifFalse: [self readFault: address] !
- address := base + instruction signedImmediate.
- value := self signedByte: address.
- self signedRegister: instruction rt put: value.!

Item was changed:
  ----- Method: MIPSSimulator>>loadByteUnsigned: (in category 'instructions - memory') -----
  loadByteUnsigned: instruction
+ | base address |
- | base address value |
  base := self unsignedRegister: instruction rs.
  address := base + instruction signedImmediate.
+ (address between: readableBase and: readableLimit)
+ ifTrue: [self unsignedRegister: instruction rt put: (memory byteAt: address + 1)]
+ ifFalse: [self readFault: address] !
- value := self unsignedByte: address.
- self unsignedRegister: instruction rt put: value.!

Item was changed:
  ----- Method: MIPSSimulator>>loadHalfword: (in category 'instructions - memory') -----
  loadHalfword: instruction
+ | base address |
- | base address value |
  base := self unsignedRegister: instruction rs.
  address := base + instruction signedImmediate.
+ (address between: readableBase and: readableLimit - 1)
+ ifTrue: [self signedRegister: instruction rt put: (memory signedShortAt: address + 1)]
+ ifFalse: [self readFault: address] !
- value := self signedHalfword: address.
- self signedRegister: instruction rt put: value.!

Item was changed:
  ----- Method: MIPSSimulator>>loadHalfwordUnsigned: (in category 'instructions - memory') -----
  loadHalfwordUnsigned: instruction
+ | base address |
- | base address value |
  base := self unsignedRegister: instruction rs.
  address := base + instruction signedImmediate.
+ (address between: readableBase and: readableLimit - 1)
+ ifTrue: [self unsignedRegister: instruction rt put: (memory unsignedShortAt: address + 1)]
+ ifFalse: [self readFault: address] !
- value := self unsignedHalfword: address.
- self unsignedRegister: instruction rt put: value.!

Item was changed:
  ----- Method: MIPSSimulator>>loadWord: (in category 'instructions - memory') -----
  loadWord: instruction
+ | base address |
- | base address value |
  base := self unsignedRegister: instruction rs.
  address := base + instruction signedImmediate.
+ (address between: readableBase and: readableLimit - 3)
+ ifTrue: [self signedRegister: instruction rt put: (memory longAt: address + 1)]
+ ifFalse: [self readFault: address] !
- value := self signedWord: address.
- self signedRegister: instruction rt put: value.!

Item was added:
+ ----- Method: MIPSSimulator>>registerStatePCIndex (in category 'accessing-abstract') -----
+ registerStatePCIndex
+ ^33!

Item was changed:
+ ----- Method: MIPSSimulator>>singleStepIn: (in category 'execution') -----
- ----- Method: MIPSSimulator>>singleStepIn: (in category 'as yet unclassified') -----
  singleStepIn: aByteArray
  self initializeWithMemory: aByteArray.
  self step.!