VM Maker: Cog-eem.45.mcz

 
Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.45.mcz

==================== Summary ====================

Name: Cog-eem.45
Author: eem
Time: 24 July 2011, 12:37:45.539 pm
UUID: 5b38d4e4-2a1f-477e-b79a-a82e37e0403a
Ancestors: Cog-eem.44

Cog needs to live somewhere, and VMMaker is where that somewhere
should be.  Update error handling for SISTA support.

=============== Diff against Cog-eem.44 ===============

Item was added:
+ ----- Method: BochsIA32Alien class>>defaultIntegerBaseInDebugger (in category 'debugger') -----
+ defaultIntegerBaseInDebugger
+ ^16!

Item was changed:
  ----- Method: BochsIA32Alien>>handleMovEbGbFailureAt:in:readOnlyBelow: (in category 'error handling') -----
  handleMovEbGbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" readOnlyBelow: minimumWritableAddress "<Integer>"
  "Convert an execution primitive failure for a byte register write into a ProcessorSimulationTrap signal."
  | modrmByte |
  ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32"
  ifTrue:
  [(ProcessorSimulationTrap
  pc: pc
  nextpc: pc + 6
  address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1))
  + (memoryArray unsignedLongAt: pc + 3 bigEndian: false)
  bitAnd: 16rFFFFFFFF)
  type: #write
  accessor: (#(al cl dl bl ah ch dh bh) at: ((modrmByte >> 3 bitAnd: 7) + 1)))
  signal]
  ifFalse:
+ [self reportPrimitiveFailure]!
- [self handleExecutionPrimitiveFailureAt: pc
- in: memoryArray
- readOnlyBelow: minimumWritableAddress]!

Item was changed:
  ----- Method: BochsIA32Alien>>handleMovEvGvFailureAt:in:readOnlyBelow: (in category 'error handling') -----
  handleMovEvGvFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" readOnlyBelow: minimumWritableAddress "<Integer>"
  "Convert an execution primitive failure for a register write into a ProcessorSimulationTrap signal."
+ | modrmByte |
+ ^((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC7) = 16r5 "ModRegInd & disp32"
- | modrmByte address |
- ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC7) = 16r5 "ModRegInd & disp32"
-    and: [(address := memoryArray unsignedLongAt: pc + 3 bigEndian: false) >= minimumWritableAddress])
  ifTrue:
  [(ProcessorSimulationTrap
  pc: pc
  nextpc: pc + 6
+ address: (memoryArray unsignedLongAt: pc + 3 bigEndian: false)
- address: address
  type: #write
  accessor: (#(eax ecx edx ebx esp ebp esi edi) at: ((modrmByte >> 3 bitAnd: 7) + 1)))
  signal]
  ifFalse:
+ [self reportPrimitiveFailure]!
- [self handleExecutionPrimitiveFailureAt: pc
- in: memoryArray
- readOnlyBelow: minimumWritableAddress]!

Item was changed:
  ----- Method: BochsIA32Alien>>handleMovGbEbFailureAt:in:readOnlyBelow: (in category 'error handling') -----
  handleMovGbEbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" readOnlyBelow: minimumWritableAddress "<Integer>"
  "Convert an execution primitive failure for a byte register load into a ProcessorSimulationTrap signal."
  | modrmByte |
  ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32"
  ifTrue:
  [(ProcessorSimulationTrap
  pc: pc
  nextpc: pc + 6
  address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1))
  + (memoryArray unsignedLongAt: pc + 3 bigEndian: false)
  bitAnd: 16rFFFFFFFF)
  type: #read
  accessor: (#(al: cl: dl: bl: ah: ch: dh: bh:) at: ((modrmByte >> 3 bitAnd: 7) + 1)))
  signal]
  ifFalse:
+ [self reportPrimitiveFailure]!
- [self handleExecutionPrimitiveFailureAt: pc
- in: memoryArray
- readOnlyBelow: minimumWritableAddress]!

Item was changed:
  ----- Method: BochsIA32Alien>>handleMovGvEvFailureAt:in:readOnlyBelow: (in category 'error handling') -----
  handleMovGvEvFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" readOnlyBelow: minimumWritableAddress "<Integer>"
  "Convert an execution primitive failure for a register load into a ProcessorSimulationTrap signal."
  | modrmByte |
  ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC7) = 16r5) "ModRegInd & disp32"
  ifTrue:
  [(ProcessorSimulationTrap
  pc: pc
  nextpc: pc + 6
  address: (memoryArray unsignedLongAt: pc + 3 bigEndian: false)
  type: #read
  accessor: (#(eax: ecx: edx: ebx: esp: ebp: esi: edi:) at: ((modrmByte >> 3 bitAnd: 7) + 1)))
  signal]
  ifFalse:
+ [self reportPrimitiveFailure]!
- [self handleExecutionPrimitiveFailureAt: pc
- in: memoryArray
- readOnlyBelow: minimumWritableAddress]!