VM Maker: CogPools-ISAs-eem.11.mcz

 
Eliot Miranda uploaded a new version of CogPools-ISAs to project VM Maker:
http://source.squeak.org/VMMaker/CogPools-ISAs-eem.11.mcz

==================== Summary ====================

Name: CogPools-ISAs-eem.11
Author: eem
Time: 2 February 2020, 6:41:07.818785 pm
UUID: 270b820b-51c1-4a2c-a8d6-3a816b146c53
Ancestors: CogPools-ISAs-eem.10

Extend extractOffsetFromLoadStore: to handle ldp/stp

=============== Diff against CogPools-ISAs-eem.10 ===============

Item was changed:
  ----- Method: ARMv8A64Opcodes class>>extractOffsetFromLoadStore: (in category 'accessing') -----
  extractOffsetFromLoadStore: word
  "C4.1.4 Loads and Stores C4-266
 
  Table C4-5 Encoding table for the Loads and Stores group
 
  LDAPR/STLR (unscaled immediate) on page C4-279 signed imm9 12 - 20
  Load/store register (unscaled immediate) on page C4-283 signed imm9 12 - 20
  Load/store register (immediate post-indexed) on page C4-284 signed imm9 12 - 20
  Load/store register (immediate pre-indexed) on page C4-286 signed imm9 12 - 20
  Load/store register (pac) on page C4-297 signed imm9 12 - 20
+ Load/store register (unsigned immediate) on page C4-297 unsigned imm12 21 - 10
+ Load/store register pair (sugned immediate) on page C4-282 signed imm7 15 - 21"
+ "(word >> 23 bitAnd: 2r001110110) binary"
+ ^(word >> 23 bitAnd: 2r001110110)
+ caseOf: {
+ [2r001110010 "ld/st unsigned immediate op0 = xx11, b27=1, b25=0, op2 = 1x"]
+ -> [(word >> 10 bitAnd: 1 << 12 - 1) bitShift: word >> 30].
+ [2r001010010] "ldp/stp op0=xx10, b27=1, op2 = 10"
+ -> [(word >> 15 bitAnd: 1 << 7 - 1) - (word >> 14 bitAnd: 1 << 7) << 3].
+ }
+ otherwise: [(word >> 12 bitAnd: 1 << 9 - 1) - (word >> 11 bitAnd: 1 << 9)]!
- Load/store register (unsigned immediate) on page C4-297 unsigned imm12 21 - 10"
- ^(word >> 23 bitAnd: 2r001110110) = 2r001110010 "op0 = xx11, b27=1, b25=0, op2 = 1x"
- ifTrue: [(word >> 10 bitAnd: 1 << 12 - 1) bitShift: word >> 30]
- ifFalse: [(word >> 12 bitAnd: 1 << 9 - 1) - (word >> 11 bitAnd: 1 << 9)]!