Eliot Miranda uploaded a new version of CogPools-ISAs to project VM Maker:
http://source.squeak.org/VMMaker/CogPools-ISAs-eem.12.mcz==================== Summary ====================
Name: CogPools-ISAs-eem.12
Author: eem
Time: 12 November 2020, 8:19:03.781938 pm
UUID: f332f7eb-c22a-4d78-99e8-bfa62c9f3f3c
Ancestors: CogPools-ISAs-eem.11
Support for ClosedVMMaker-eem.111.
Implement the 8.0 version of ceTryLockVMOwner above LDAXR/STLXR/CLREX, adding spiffy new CBNZ/CBZ.
=============== Diff against CogPools-ISAs-eem.11 ===============
Item was changed:
----- Method: ARMv8A64Opcodes class>>extractOffsetFromLoadStore: (in category 'accessing') -----
extractOffsetFromLoadStore: word
"C4.1.4 Loads and Stores C4-266
Table C4-5 Encoding table for the Loads and Stores group
LDAPR/STLR (unscaled immediate) on page C4-279 signed imm9 12 - 20
Load/store register (unscaled immediate) on page C4-283 signed imm9 12 - 20
Load/store register (immediate post-indexed) on page C4-284 signed imm9 12 - 20
Load/store register (immediate pre-indexed) on page C4-286 signed imm9 12 - 20
Load/store register (pac) on page C4-297 signed imm9 12 - 20
Load/store register (unsigned immediate) on page C4-297 unsigned imm12 21 - 10
+ Load/store register pair (signed immediate) on page C4-282 signed imm7 15 - 21
+ LDAXR/STRXR register on page C4-279"
- Load/store register pair (sugned immediate) on page C4-282 signed imm7 15 - 21"
"(word >> 23 bitAnd: 2r001110110) binary"
^(word >> 23 bitAnd: 2r001110110)
caseOf: {
[2r001110010 "ld/st unsigned immediate op0 = xx11, b27=1, b25=0, op2 = 1x"]
-> [(word >> 10 bitAnd: 1 << 12 - 1) bitShift: word >> 30].
[2r001010010] "ldp/stp op0=xx10, b27=1, op2 = 10"
-> [(word >> 15 bitAnd: 1 << 7 - 1) - (word >> 14 bitAnd: 1 << 7) << 3].
+ [2r000010000] "ldaxr op0=1, o1=1, op2 = 0"
+ -> [0].
}
otherwise: [(word >> 12 bitAnd: 1 << 9 - 1) - (word >> 11 bitAnd: 1 << 9)]!
Locked
