VM Maker: VMMaker.gdb-bgs.2747.mcz

 
Boris G. Shingarov uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.gdb-bgs.2747.mcz

==================== Summary ====================

Name: VMMaker.gdb-bgs.2747
Author: bgs
Time: 26 May 2020, 5:20:53.475745 pm
UUID: df2f1386-35b8-4e3c-b848-2fe2764ad3df
Ancestors: VMMaker.gdb-bgs.2746

Execution on non-simulated hardware.
Corresponds to GDB.bgs-2.

=============== Diff against VMMaker.gdb-bgs.2746 ===============

Item was changed:
  ----- Method: CogVMSimulator>>moveMethodCacheToMemoryAt: (in category 'initialization') -----
  moveMethodCacheToMemoryAt: address
  | oldMethodCache |
  oldMethodCache := methodCache.
  "In the VM the methodCache is written as a normal array with 1-relative addressing.
  In C this works by allocating an extra element in the methodCache array (see
  class-side declareCVarsIn:).  In simulation simply position the start of the methodCache
  one word lower, achieving the same effect.  -1 because CArrayAccessor is 0-relative
  and adds 1 on accesses itself."
  methodCache := CMethodCacheAccessor new
  objectMemory: objectMemory
  at: address
  array: oldMethodCache
  functionPointerIndex: MethodCachePrimFunction
  entrySize: MethodCacheEntrySize.
  self assert: address - objectMemory wordSize = self methodCacheAddress.
+ " 1 to: MethodCacheSize do:
- 1 to: MethodCacheSize do:
  [:i|
+ self assert: (methodCache at: i) = 0]. "
- self assert: (methodCache at: i) = 0].
  methodCache at: 1 put: 16rC4EC4.
  self assert: (objectMemory longAt: address) = 16rC4EC4.
  1 to: MethodCacheSize do:
  [:i|
  methodCache at: i put: (oldMethodCache at: i)]!

Item was changed:
  ----- Method: CogVMSimulator>>movePrimTraceLogToMemoryAt: (in category 'initialization') -----
  movePrimTraceLogToMemoryAt: address
  | oldTraceLog |
  oldTraceLog := primTraceLog.
  primTraceLog := CArrayOfLongsAccessor new
  objectMemory: objectMemory at: address.
  self assert: address = self primTraceLogAddress.
+ " 0 to: PrimTraceLogSize - 1 do:
- 0 to: PrimTraceLogSize - 1 do:
  [:i|
+ self assert: (primTraceLog at: i) = 0]."
- self assert: (primTraceLog at: i) = 0].
  primTraceLog at: 0 put: 16rC4EC4.
  self assert: (objectMemory longAt: address) = 16rC4EC4.
  0 to: PrimTraceLogSize - 1 do:
  [:i|
  primTraceLog at: i put: (oldTraceLog at: i)]!

Item was changed:
  ----- Method: Cogit>>simulateLeafCallOf: (in category 'simulation only') -----
  simulateLeafCallOf: someFunction
  "Simulate execution of machine code that leaf-calls someFunction,
  answering the result returned by someFunction."
  "CogProcessorAlienInspector openFor: coInterpreter"
  <doNotGenerate>
  | priorSP priorPC priorLR spOnEntry bogusRetPC |
+
  self recordRegisters.
  priorSP := processor sp.
  priorPC := processor pc.
  priorLR := backEnd hasLinkRegister ifTrue: [processor lr].
  processor
  setFramePointer: coInterpreter getCFramePointer stackPointer: coInterpreter getCStackPointer;
  simulateLeafCallOf: someFunction
  nextpc: (bogusRetPC := 16rBADF00D5 roundTo: backEnd codeGranularity)
  memory: coInterpreter memory.
  spOnEntry := processor sp.
  self recordInstruction: {'(simulated call of '. someFunction. ')'}.
  [[processor pc between: 0 and: methodZone zoneEnd] whileTrue:
  [[singleStep
  ifTrue: [
  self recordProcessing.
  self maybeBreakAt: processor pc.
  processor
  singleStepIn: coInterpreter memory
  minimumAddress: guardPageSize
  readOnlyBelow: methodZone zoneEnd]
  ifFalse: [processor
  runInMemory: coInterpreter memory
  minimumAddress: guardPageSize
  readOnlyBelow: methodZone zoneEnd]]
  on: ProcessorSimulationTrap, Error
  do: [:ex| | retpc |
  processor pc = bogusRetPC ifTrue:
  [self recordInstruction: {'(simulated (real) return to '. processor pc. ')'}.
  ^processor cResultRegister].
  ex class == ProcessorSimulationTrap ifTrue:
  [ex type == #read ifTrue:
  [self handleReadSimulationTrap: ex. ex resume: processor].
  ex type == #write ifTrue:
  [self handleWriteSimulationTrap: ex. ex resume: processor].
  ex type == #return ifTrue:
  [retpc := processor leafRetpcIn: coInterpreter memory.
  self assert: retpc = bogusRetPC.
  processor simulateLeafReturnIn: coInterpreter memory.
  self recordInstruction: {'(simulated return to '. retpc. ')'}.
  ^processor cResultRegister]].
  ex pass]].
  processor pc = bogusRetPC ifTrue:
  [self recordInstruction: {'(simulated (real) return to '. processor pc. ')'}].
  ^processor cResultRegister]
  ensure:
  [processor sp: priorSP.
  processor pc: priorPC.
  priorLR ifNotNil: [:lr| processor lr: lr]]!

Item was changed:
  ----- Method: Spur32BitMemoryManager>>memoryClass (in category 'simulation') -----
  memoryClass
  <doNotGenerate>
+ ^TargetAwareX86 remoteMemoryClass
- | choices |
- choices := #(LittleEndianBitmap Gem5SharedRAM).
- ^Smalltalk at: (choices at: (UIManager default chooseFrom: choices)).
 
  "^self endianness == #little
  ifTrue: [LittleEndianBitmap]
  ifFalse: [Bitmap]"
 
 
 
 
  !