VM Maker: VMMaker.oscog-eem.1536.mcz

 
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1536.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.1536
Author: eem
Time: 30 November 2015, 5:54:18.551 pm
UUID: fe6b5e3a-872a-44b3-bae8-d4a2cbb678f8
Ancestors: VMMaker.oscog-eem.1535

X64 Cogit:
Make rewriteConditionalJumpLongAt:target: a default to be overridden.

Now that the 64-bit Alien accessors and the Bochs x64 emulator have been fixed, get division working on x64.  Add XorRR support for the division primitives.

=============== Diff against VMMaker.oscog-eem.1535 ===============

Item was removed:
- ----- Method: CogARMCompiler>>rewriteConditionalJumpLongAt:target: (in category 'inline cacheing') -----
- rewriteConditionalJumpLongAt: callSiteReturnAddress target: callTargetAddress
- ^self rewriteJumpLongAt: callSiteReturnAddress target: callTargetAddress!

Item was added:
+ ----- Method: CogAbstractInstruction>>rewriteConditionalJumpLongAt:target: (in category 'inline cacheing') -----
+ rewriteConditionalJumpLongAt: callSiteReturnAddress target: callTargetAddress
+ "Rewrite a conditional jump long to jump to target.  This version defaults to using
+ rewriteJumpLongAt:, which works for many ISAs.  Subclasses override if necessary."
+ ^self rewriteJumpLongAt: callSiteReturnAddress target: callTargetAddress!

Item was removed:
- ----- Method: CogIA32Compiler>>rewriteConditionalJumpLongAt:target: (in category 'inline cacheing') -----
- rewriteConditionalJumpLongAt: callSiteReturnAddress target: callTargetAddress
- ^self rewriteJumpLongAt: callSiteReturnAddress target: callTargetAddress!

Item was added:
+ ----- Method: CogX64Compiler>>canDivQuoRem (in category 'testing') -----
+ canDivQuoRem
+ <inline: true>
+ ^true!

Item was added:
+ ----- Method: CogX64Compiler>>concretizeXorRR (in category 'generate machine code') -----
+ concretizeXorRR
+ "Will get inlined into concretizeAt: switch."
+ <inline: true>
+ | regLHS regRHS |
+ regLHS := self concreteRegister: (operands at: 0).
+ regRHS := self concreteRegister: (operands at: 1).
+ machineCode
+ at: 0 put: (self rexR: regRHS x: 0 b: regLHS);
+ at: 1 put: 16r33;
+ at: 2 put: (self mod: ModReg RM: regLHS RO: regRHS).
+ ^machineCodeSize := 3!

Item was added:
+ ----- Method: CogX64Compiler>>setsConditionCodesFor: (in category 'testing') -----
+ setsConditionCodesFor: aConditionalJumpOpcode
+ <inline: false> "to save Slang from having to be a real compiler (it can't inline switches that return)"
+ "Answer if the receiver's opcode sets the condition codes correctly for the given conditional jump opcode."
+ ^opcode caseOf:
+ { [ArithmeticShiftRightCqR] -> [self shiftSetsConditionCodesFor: aConditionalJumpOpcode].
+ [ArithmeticShiftRightRR] -> [self shiftSetsConditionCodesFor: aConditionalJumpOpcode].
+ [LogicalShiftLeftCqR] -> [self shiftSetsConditionCodesFor: aConditionalJumpOpcode].
+ [LogicalShiftLeftRR] -> [self shiftSetsConditionCodesFor: aConditionalJumpOpcode].
+ [XorRR] -> [true]
+ }
+ otherwise: [self halt: 'unhandled opcode in setsConditionCodesFor:'. false]!

Item was added:
+ ----- Method: CogX64Compiler>>shiftSetsConditionCodesFor: (in category 'testing') -----
+ shiftSetsConditionCodesFor: aConditionalJumpOpcode
+ "OF flag only guaranteed to be set for 1-bit shifts.  See [1] p 490.
+ Only SF, ZF & PF set according to result.  Since the question is currently
+ asked only for Zero and Negative use the following simplification."
+ <inline: true>
+ ^(aConditionalJumpOpcode between: JumpZero and: JumpNonNegative)!