VM Maker: VMMaker.oscog-nice.2216.mcz

Previous Topic Next Topic
 
classic Classic list List threaded Threaded
1 message Options
Reply | Threaded
Open this post in threaded view
|

VM Maker: VMMaker.oscog-nice.2216.mcz

commits-2
 
Nicolas Cellier uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-nice.2216.mcz

==================== Summary ====================

Name: VMMaker.oscog-nice.2216
Author: nice
Time: 19 May 2017, 2:42:50.200889 pm
UUID: e7100d55-b865-d843-8232-f14273653125
Ancestors: VMMaker.oscog-eem.2215

The code for restoring saved registers after a CallRT: did a benign iteration in excess.

The register save part does store the highBit of the mask in reg.
For example, for callerSavedRegsToBeSaved mask = 2r100,
we will have reg = 3 after the save loop.

The restore did start by inspecting bit 1<<reg, that is 2r1000, and that's one bit to far.
This is benign as long as no overflow occurs, but let's be safer.

=============== Diff against VMMaker.oscog-eem.2215 ===============

Item was changed:
  ----- Method: Cogit>>CallFullRT:registersToBeSavedMask: (in category 'compile abstract instructions') -----
  CallFullRT: callTarget registersToBeSavedMask: registersToBeSaved
  <returnTypeC: #'AbstractInstruction *'>
  | callerSavedRegsToBeSaved lastInst reg registersToBePushed |
  <var: 'lastInst' type: #'AbstractInstruction *'>
  callerSavedRegsToBeSaved := CallerSavedRegisterMask bitAnd: registersToBeSaved.
 
  backEnd canPushPopMultipleRegisters
  ifTrue: [backEnd genPushRegisterMask: callerSavedRegsToBeSaved]
  ifFalse:
  [registersToBePushed := callerSavedRegsToBeSaved.
  reg := 0.
  [registersToBePushed ~= 0] whileTrue:
  [(registersToBePushed anyMask: 1) ifTrue:
  [self PushR: reg].
  reg := reg + 1.
  registersToBePushed := registersToBePushed >>> 1]].
 
  lastInst := self CallFullRT: callTarget.
 
  backEnd canPushPopMultipleRegisters
  ifTrue: [^backEnd genPopRegisterMask: callerSavedRegsToBeSaved]
  ifFalse:
+ [[reg > 0] whileTrue:
+ [reg := reg - 1.
+ (callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue:
+ [lastInst := self PopR: reg]].
- [[reg >= 0] whileTrue:
- [(callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue:
- [lastInst := self PopR: reg].
- reg := reg - 1].
 
  ^lastInst]!

Item was changed:
  ----- Method: Cogit>>CallRT:registersToBeSavedMask: (in category 'compile abstract instructions') -----
  CallRT: callTarget registersToBeSavedMask: registersToBeSaved
  <returnTypeC: #'AbstractInstruction *'>
  | callerSavedRegsToBeSaved lastInst reg registersToBePushed |
  <var: 'lastInst' type: #'AbstractInstruction *'>
  callerSavedRegsToBeSaved := CallerSavedRegisterMask bitAnd: registersToBeSaved.
 
  backEnd canPushPopMultipleRegisters
  ifTrue: [backEnd genPushRegisterMask: callerSavedRegsToBeSaved]
  ifFalse:
  [registersToBePushed := callerSavedRegsToBeSaved.
  reg := 0.
  [registersToBePushed ~= 0] whileTrue:
  [(registersToBePushed anyMask: 1) ifTrue:
  [self PushR: reg].
  reg := reg + 1.
  registersToBePushed := registersToBePushed >>> 1]].
 
  lastInst := self CallRT: callTarget.
 
  backEnd canPushPopMultipleRegisters
  ifTrue: [^backEnd genPopRegisterMask: callerSavedRegsToBeSaved]
  ifFalse:
+ [[reg > 0] whileTrue:
+ [reg := reg - 1.
+ (callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue:
+ [lastInst := self PopR: reg]].
- [[reg >= 0] whileTrue:
- [(callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue:
- [lastInst := self PopR: reg].
- reg := reg - 1].
 
  ^lastInst]!