VM Maker: VMMaker.oscog-nice.2709.mcz

 
Nicolas Cellier uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-nice.2709.mcz

==================== Summary ====================

Name: VMMaker.oscog-nice.2709
Author: nice
Time: 9 February 2020, 5:50:24.025123 pm
UUID: 32c7be71-4aa0-4cda-8ca7-d1a604236b6e
Ancestors: VMMaker.oscog-eem.2708

Try and restore the lowcode capability to return int64 result on various 32bits ABI.

The ABIResultRegHigh needs to be defined.

=============== Diff against VMMaker.oscog-eem.2708 ===============

Item was changed:
  ----- Method: CogARMCompiler class>>initializeAbstractRegisters (in category 'class initialization') -----
  initializeAbstractRegisters
  "Assign the abstract registers with the identities/indices of the relevant concrete registers."
 
  TempReg := R0.
  ClassReg := R2.
  ReceiverResultReg := R5.
  SendNumArgsReg := R6.
  SPReg := SP. "a.k.a. R13" self assert: SP = 13.
  FPReg := R11.
  Arg0Reg := R3. "overlaps with last C arg reg"
  Arg1Reg := R4.
  Extra0Reg := R7.
  Extra1Reg := R8.
  Extra2Reg := R9.
  VarBaseReg := R10. "Must be callee saved" self assert: ConcreteVarBaseReg = R10.
  RISCTempReg := R12. "a.k.a. IP" self assert: ConcreteIPReg = R12.
  LinkReg := LR. "R14"
  PCReg := PC. "R15"
 
  "According to IHI0042E ARM Architecture Procedure Calling Standard, in section 5.1.1:
  A subroutine must preserve the contents of the registers r4-r8, r10, r11 and SP (and r9 in PCS variants that designate r9 as v6).
  SP = r13, so the callee-saved regs are r4-r8 & r10-r12.
  The caller-saved registers are those that are not callee-saved and not reserved for hardware/abi uses,
  i..e r0-r3, r9 & r12.
  We exclude registers 0 & 1 (TempReg/CArg0Reg & CArg1Reg) from the CallerSavedRegisterMask because we only
  use them for argument passing and so never want to save and restore them.  In fact restoring TempReg/CArg0Reg
  would overwrite function results, so it shouldn't be included under any circumstances."
 
  ABICalleeSavedRegisterMask := self registerMaskFor: 4 and: 5 and: 6 and: 7 and: 10 and: 11.
  ABICallerSavedRegisterMask := self registerMaskFor: 0 and: 1 and: 2 and: 3 and: 9 and: 12.
  CallerSavedRegisterMask := ABICallerSavedRegisterMask
  bitAnd: (self registerMaskFor: ClassReg and: ReceiverResultReg and: SendNumArgsReg and: Arg0Reg and: Arg1Reg).
+ ABIResultRegHigh := R1.
 
  NumRegisters := 16.
 
  DPFPReg0 := D0.
  DPFPReg1 := D1.
  DPFPReg2 := D2.
  DPFPReg3 := D3.
  DPFPReg4 := D4.
  DPFPReg5 := D5.
  DPFPReg6 := D6.
  DPFPReg7 := D7.
 
  NumFloatRegisters := 8!

Item was changed:
  ----- Method: CogIA32Compiler class>>initializeAbstractRegisters (in category 'class initialization') -----
  initializeAbstractRegisters
  "Assign the abstract registers with the identities/indices of the relevant concrete registers."
 
  "N.B. EAX ECX & EDX are caller-save (scratch) registers.  Hence we use ECX for class and EDX for
  receiver/result since these are written in all normal sends.  EBX ESI & EDI are callee-save."
 
  TempReg := EAX.
  ClassReg := ECX.
  ReceiverResultReg := EDX.
  SendNumArgsReg := EBX.
  SPReg := ESP.
  FPReg := EBP.
  Arg0Reg := ESI.
  Arg1Reg := EDI.
 
  ABICalleeSavedRegisterMask := self registerMaskFor: EBX and: ESI and: EDI.
  ABICallerSavedRegisterMask := self registerMaskFor: EAX and: ECX and: EDX.
  CallerSavedRegisterMask := ABICallerSavedRegisterMask
  bitAnd: (self registerMaskFor: ClassReg and: ReceiverResultReg and: SendNumArgsReg and: Arg0Reg and: Arg1Reg).
+ ABIResultRegHigh := EDX.
 
  NumRegisters := 8.
 
  DPFPReg0 := XMM0L.
  DPFPReg1 := XMM1L.
  DPFPReg2 := XMM2L.
  DPFPReg3 := XMM3L.
  DPFPReg4 := XMM4L.
  DPFPReg5 := XMM5L.
  DPFPReg6 := XMM6L.
  DPFPReg7 := XMM7L.
 
  NumFloatRegisters := 8!

Item was changed:
  ----- Method: CogMIPSELCompiler class>>initializeAbstractRegisters (in category 'class initialization') -----
  initializeAbstractRegisters
  "Assign the abstract registers with the identities/indices of the relevant concrete registers."
 
  "See MIPSConstants>>initializeRegisters for a description of the C ABI."
 
  "Note we can fit all of the abstract registers in C preserved registers, and
  not need to save or restore them at runtime calls."
 
  ReceiverResultReg := S0.
  Arg0Reg := S1.
  Arg1Reg := S2.
  ClassReg := S3.
  SendNumArgsReg := S4.
  TempReg := S5.
  VarBaseReg := S6. "Must be callee saved"
  SPReg := SP.
  FPReg := FP.
  RISCTempReg := AT.
  LinkReg := RA.
 
  self flag: #OABI. "see e.g. http://refspecs.linuxbase.org/elf/mipsabi.pdf"
  ABICalleeSavedRegisterMask := self
  registerMaskFor: S0 and: S1 and: S2 and: S3
  and: S4 and: S5 and: S6 and: S7.
  ABICallerSavedRegisterMask := self
  registerMaskFor: T0 and: T1 and: T2 and: T3
  and: T4 and: T5 and: T6 and: T7 and: T8 and: T9.
  CallerSavedRegisterMask := ABICallerSavedRegisterMask
  bitAnd: (self registerMaskFor: ClassReg and: ReceiverResultReg and: SendNumArgsReg and: Arg0Reg and: Arg1Reg).
  ABIResultReg := V0.
+ ABIResultRegHigh := V1.
 
  NumRegisters := 32.
 
  self flag: #todo.
  "Extra0Reg := ??.
  Extra1Reg := ??.
  Extra2Reg := ??.
  Extra3Reg := ??.
  Extra4Reg := ??.
  Extra5Reg := ??.
  Extra6Reg := ??.
  Extra7Reg := ??."
 
  self flag: #todo.
  "DPFPReg0 := ??.
  DPFPReg1 := ??.
  DPFPReg2 := ??.
  DPFPReg3 := ??.
  DPFPReg4 := ??.
  DPFPReg5 := ??.
  DPFPReg6 := ??.
  DPFPReg7 := ??.
  DPFPReg8 := ??.
  DPFPReg9 := ??.
  DPFPReg10 := ??.
  DPFPReg11 := ??.
  DPFPReg12 := ??.
  DPFPReg13 := ??.
  DPFPReg14 := ??.
  DPFPReg15 := ??"!